This is an online RISC-V Interpreter, developed as a part teaching aid for CS3410 course at Cornell. It allows you to run a CPU from 32 to 256 hz clock frequnecy (for teaching of-course). Additionally it has the following features:

 

  • Reset to load the code, Step one instruction, or Run all instructions
  • Set a breakpoint by clicking on the line number (only for Run)
  • View registers on the right, memory on the bottom of this page

 

The following instructions are currently supported by the Cornell RISC-V Interpreter:

 

  • Arithmetics: ADD, ADDI, SUB
  • Logical: AND,ANDI,OR,ORI, XOR,XORI
  • Sets: SLT, SLTI, SLTU, SLTIU
  • Shifts: SRA, SRAI, SRL, SRLISLL, SLLI
  • Memory: LW, SW, LB, SB
  • PC: LUI, AUIPC
  • Jumps: JAL, JALR
  • Branches: BEQ, BNE,BLT, BGE, BLTU, BGEU

 

You can check out the Interpreter here