NutShell is a processor developed by the OSCPU (Open Source Chip Project by University) team. Currently it supports riscv64/32. No. NutShell is originally based on the NOOP project, an educational RV32 SoC designed by Nanjing University (NJU).

 

NutShell is a modular design using the Chisel language, based on the RISC-V RV64 open instruction set sequential single-issue processor implementation, which belongs to the “Lifetime One Core” project of the University of Science and Technology of China and the Institute of Computing Technology. Many designs of this processor have been influenced by NOOP (Five-stage pipeline processor used for teaching in Nanjing University).

NutShell is designed based on a 9-stage pipeline sequence. In terms of storage system, NutShell includes a first-level instruction cache, a data cache, and an optional second-level cache. The processor is connected to the outside world through the AXI4 bus. NutShell supports three privilege levels: M, S, and U. Supports I, M, A, C, Zicsr and Zifencei instruction extensions, supports virtual and real address translation, includes page table buffer (TLB) to speed up the address translation process, and supports Sv39 paging scheme.

The overall microstructure design is shown in the figure below:

The design of NutShell consists of three parts: the front-end (Front-end) responsible for branch prediction and instruction fetching, the execution engine (Execution Engine, also known as the back-end Back-end) responsible for executing instructions, and the memory access for memory access operations Unit (LSU). After the front-end completes instruction fetching and decoding operations, it will place instructions in the decoding buffer. The back-end reads instructions from the decoding buffer and executes them sequentially. The memory access unit acts as a functional unit (FU) Included in the backend pipeline. Control logic is distributed across various parts of the pipeline.

 

You can download the NutShell processor core here