NaxRiscv was designed using SpinalHDL (a Scala hardware description library). One goal of the implementation was to explore new hardware elaboration paradigms as :

  • Automatic pipelining framework
  • Distributed hardware elaboration
  • Software paradigms applied to hardware elaboration (ex : software interface)

A few notes about it :

  • You can get generate the Verilog or the VHDL from it.
  • A whole chapter (Abstractions / HDL) of the doc is dedicated to explore the different paradigms used

 

You can download NaxRiscv here